A bus for handling the transmission of serial data typically employs two complementary, high and low lines. A first digital data bit ("1" or "0") is defined when the lines assume the same voltage, sometimes referred to as the "common mode voltage". A second digital data bit is defined when the voltage difference between the two lines, referred to as the "differential mode voltage", is driven above a threshold potential.
In one type of transmission bus, the common mode voltage is a value midway between high and low voltage sources. When the lines are driven to the differential mode voltage by a driver, a receiver connected to the bus will sense this differential mode voltage and interpret it as a digital bit. It is particularly critical when driving the lines to the differential mode voltage that the common mode voltage is the reference midpoint about which the high and low lines symmetrically swing. If the midpoint is disturbed to the extent that the differential mode voltage bumps up against the high or low voltage sources, the differential mode voltage can shrink. If the differential mode voltage is too small , the receiver may not be able to accurately read it.
Some transmission buses are designed for multiple users, i.e., buses which have a number of transmitting entities or drivers which may compete for the bus at the same time. If the transmitting entities are connected to such a bus and have priority on a first come, first serve basis, there is a possibility of one entity creating electrical interference with another. For example, each transmitting entity is tied to a high and low reference voltage. If one of these reference voltages is "lost", the internal control voltages of that entity may vary widely with respect to the common mode and differential mode voltages appearing on the bus. This may result in the common mode and/or differential mode voltages appearing as positive or negative voltage spikes with respect to the internal control voltages within the entity. If the entity were to sink or otherwise create a leakage path for such voltage "spikes," the common mode voltage could be easily disturbed. This can result in data being transmitted in error.